

High Speed Interface
产品描述
技术介绍
HDMI 1.4b Transceiver Phy &Link silicon proven IP
- Maximum Resolution support : 4K x 2K (3840x2160) pixels @24/25/30Hz
- UD(4K) TV support : 4K x 2K (4096x2160) pixels @24Hz
- 3D Video support: 1080p 3D(1920x2160) @60Hz
- TMDS clock: 340MHz
- Content Protection : HDCP
- HDMI CTS Ver.1.4b Test(CTS 1.4b, October 11, 2011) : pass
Measurement: K28.5 3.0Gbps data input to 'HDMI-Rx to HDMI Tx Chip'
MHL 2.1 Phy &Link silicon proven IP
- Data rate : 3Gbps
- Clock Speed : 75 MHz
- Resolution : Full HD 1080p @60Hz
- Mode : 24bit Pixel Mode, Packed Pixel Mode
- Audio : 7.1-Channel Surround-sound 支持
- HDCP (with error detection and correction by h/w)
- MHL CTS Version 1.2 Test : pass
DisplayPort 1.2a Phy &Link silicon proven IP
- Support 1, 2, or 4 lanes configuration
- Data rate : 5.4Gbps
- AUX Channel 1 MHz
- I2C over AUX Channel
- video format in RGB, YCbCr 4:4:4/4:2:2
- Deep color up to 16-bits per component
- HPD (hot plug detect) signal line
- stereo (two channel) 16 bit per sample LPCM
- DisplayPort CTS test : pass
拥有核心技术
Analog IP及设计技术
- PLL(Phase Locked Loop)
- Serializer
- 发送Driver
- 接收AMP
- Equalizer
- CDR(Clock Data Recovery)
- De-serializer
- DLL(Delay Locked Loop)
- ESD保护电路
Digital IP
- HDMI protocol Link RTL IP
- MHL protocol Link RTL IP
- DisplayPort protocol Link RTL IP
- USI-T protocol Link RTL IP
- USI-GF protocol Link RTL IP
- LVDS protocol Link RTL IP
产品介绍
概述
高速接口技术是一种用于在各种多媒体设备之间传输和接收视频/音频/数据的技术。Digital TV, PC随着数字电视、PC、显示器等分辨率的提高,国际上已建立并使用大容量数字视音频信号传输接口标准,公司拥有HDMI/MHL/DisplayPort接口核心技术。
产品
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综合接口 SoC
Multi-port & Multi-standard Interface Switch Soc 综合 SOC 框图
规格
Input : HDMI/MHL dual 4 Port / DisplayPort 1Port
Output : HDMI 1Port
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Interface IP
奥门金沙9001
中国境内首屈一指提供大尺寸高清面板显示解决方案的半导体设计公司